CD4522BPW

Mfr. #:: CD4522BPW
描述:: Counter ICs CMOS Prog BCD Divide-By-N Counter
生命週期:: 製造商新產品
數據表:: CD4522BPW 數據表
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更多信息:: CD4522BPW 更多信息 CD4522BPW Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 計數器 IC

RoHS：: Y

安裝方式：: 貼片/貼片

包裝/案例：: TSSOP-16

邏輯系列：: CD4000

位數：: 4 bit

計數順序：: 向下

工作電源電壓：: 3 V to 18 V

最低工作溫度：: - 55 C

最高工作溫度：: + 125 C

系列：: CD4522B

打包：: 管子

功能：: 櫃檯

工作溫度範圍：: - 55 C to + 125 C

輸出電流：: +/- 1.5 mA

品牌：: 德州儀器

產品類別：: 計數器 IC

出廠包裝數量：: 90

子類別：: 計數器 IC

單位重量：: 0.002183 oz

Tags: CD4522BP, CD4522, CD452, CD45, CD4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4522BPW 描述

***as Instruments: CMOS Programmable BCD Divide-By-N Counter 16-TSSOP -55 to 125

***ical: Counter/Divider Single 4-Bit Decade Down 16-Pin TSSOP Tube

***ment14 APAC: LOGIC, PRG BCD DIV-BY-N CNTR, 16TSSOP; Counter Type:BCD Divide-by-N; Clock Frequency:8MHz; Count Maximum:9; Supply Voltage Range:3V to 18V; Logic Case Style:TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; SVHC:No SVHC (19-Dec-2011); Clock Frequency Max:8MHz; Logic IC Base Number:4522; Logic IC Family:CD4000; Logic IC Function:Programmable BCD Divide-by-N Counter; Package / Case:TSSOP; Supply Voltage Max:18V; Supply Voltage Min:3V; Termination Type:SMD

***TEXAS: CD4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.

***as Instr.: The CD4522B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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