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SN74ALVCH162268DLR

SN74ALVCH162268DLR
Mfr. #:
SN74ALVCH162268DLR
描述:
Universal Bus Functions 16-Bit Buffer/Driver With 3-State Outputs
生命週期:
製造商新產品
數據表:
SN74ALVCH162268DLR 數據表
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SN74ALVCH162268DLR 更多信息 SN74ALVCH162268DLR Product Details
產品屬性
屬性值
製造商：
德州儀器
產品分類：
通用總線功能
RoHS：
Y
邏輯類型：
註冊巴士交換器
邏輯系列：
74AL
電路數量：
1
傳播延遲時間：
5.9 ns, 5.4 ns
電源電壓 - 最大值：
3.6 V
電源電壓 - 最小值：
1.65 V
最低工作溫度：
- 40 C
最高工作溫度：
+ 85 C
包裝/案例：
SSOP-56
打包：
捲軸
功能：
註冊巴士交換器
高度：
2.59 mm
長度：
18.41 mm
組織：
12 x 2:1
輸出類型：
3-State
供應類型：
單身的
寬度：
7.49 mm
品牌：
德州儀器
安裝方式：
貼片/貼片
輸入行數：
12
輸出線數：
24
高電平輸出電流：
- 24 mA
低電平輸出電流：
24 mA
最大時鐘頻率：
0.15 GHz, 0.125 GHz, 0.12 GHz
工作電源電壓：
1.8 V, 2.5 V, 3.3 V
極性：
同相
產品類別：
通用總線功能
出廠包裝數量：
1
子類別：
邏輯 IC
單位重量：
0.024508 oz
Tags
SN74ALVCH162268, SN74ALVCH16226, SN74ALVCH1622, SN74ALVCH162, SN74ALVCH1, SN74ALVCH, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***C
Registered Bus Exchanger 1-Element 56-Pin SSOP
***ark
Universal Bus Function IC; Logic Family:ALVC; Supply Voltage Min:1.65V; Supply Voltage Max:3.6V; Package/Case:56-SSOP; No. of Pins:56; Operating Temperature Range:-40°C to +85°C; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
***as Instruments
This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH162268 is used for applications in which data must be transferred from a narrow high-speed bus to a wide, lower-frequency bus. The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKEN)\ inputs are low. The select (SEL)\ line is synchronous with CLK and selects 1B or 2B input data for the A outputs. For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage register in the A-to-2B path. Proper control of these inputs allows two sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables (OEA\, OEB\). These control terminals are registered, so bus direction changes are synchronous with CLK. The B outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible and OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE\ being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
型號 描述 庫存 價格
SN74ALVCH162268DLR
DISTI # SN74ALVCH162268DLR-ND		IC RGSTRD BUS EXCHANGER 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    SN74ALVCH162268DLR
    DISTI # 595-SN74ALVCH16226LR    		Universal Bus Functions 16-Bit Buffer/Driver With 3-State Outputs
    RoHS: Compliant    		0
      SN74ALVCH162268DLRBus Exchanger, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56
      RoHS: Compliant      		34000
      • 1000:$1.0400
      • 500:$1.0900
      • 100:$1.1400
      • 25:$1.1900
      • 1:$1.2800
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      可用性
      庫存:
      Available
      訂購:
      2000
      輸入數量:
      SN74ALVCH162268DLR的當前價格僅供參考，如果您想獲得最優惠的價格，請提交查詢或直接發送電子郵件至我們的銷售團隊[email protected]
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