CD74HC564MG4

Mfr. #:: CD74HC564MG4
描述:: Flip Flops Hi Sp CMOS Octl Pos- Edge-Trggrd Invrting
生命週期:: 製造商新產品
數據表:: CD74HC564MG4 數據表
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ECAD Model:
更多信息:: CD74HC564MG4 更多信息 CD74HC564MG4 Product Details

產品屬性
屬性值

製造商: 德州儀器

產品分類: 邏輯 - 人字拖

系列: 74HC

類型: D型

打包: 管替代包裝

包裝盒: 20-SOIC (0.295", 7.50mm Width)

工作溫度: -55°C ~ 125°C (TA)

安裝型: 表面貼裝

輸出類型: 三態，倒置

功能: 標準

電壓供應: 2 V ~ 6 V

頻率時鐘: 60MHz

元素數: 1

電流輸出高低: 7.8mA, 7.8mA

Max-Propagation-Delay-V-Max-CL: 28ns @ 6V, 50pF

電流靜態: 8μA

每個元素的位數: 8

觸發類型: 上升沿

輸入電容: 10pF

Tags: CD74HC564M, CD74HC564, CD74HC56, CD74HC5, CD74HC, CD74H, CD74, CD7

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD74HC564MG4 描述

***et: Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC Tube

***as Instruments: High Speed CMOS Logic Octal Positive-Edge-Triggered Inverting D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125

***ark: Flip-Flop Logic IC; Flip Flop Type:D; Trigger Type:Positive Edge; Output Type:Tri-State Inverted; Supply Voltage Range:2V to 6V; Logic Case Style:SOIC; No. of Pins:20; Operating Temperature Range:-55°C to +125°C ;RoHS Compliant: Yes

Market price

型號	描述	庫存	價格
CD74HC564M DISTI # 296-33110-5-ND	IC FF D-TYPE SNGL 8BIT 20SOIC RoHS: Compliant Min Qty: 1 Container: Tube	871In Stock	5000:$0.3213 2500:$0.3451 1000:$0.3808 500:$0.4760 100:$0.6021 25:$0.7380 10:$0.7850 1:$0.8900
CD74HC564MG4 DISTI # 595-CD74HC564MG4	Flip Flops Hi Sp CMOS Octl Pos- Edge-Trggrd Invrting RoHS: Compliant	0

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