CD4089BNSR

Mfr. #:: CD4089BNSR
描述:: Multipliers / Dividers CMOS Binary Rate Multiplier
生命週期:: 製造商新產品
數據表:: CD4089BNSR 數據表
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更多信息:: CD4089BNSR 更多信息 CD4089BNSR Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 乘數/除數

RoHS：: Y

產品：: 乘數

邏輯系列：: CMOS

工作電源電壓：: 3 V to 18 V

最高工作溫度：: + 125 C

最低工作溫度：: - 55 C

安裝方式：: 貼片/貼片

包裝/案例：: SO-16

打包：: 捲軸

電路數量：: 1 Circuit

系列：: CD4089B

品牌：: 德州儀器

產品類別：: 乘數/除數

出廠包裝數量：: 2000

子類別：: 邏輯 IC

單位重量：: 0.007079 oz

Tags: CD4089BN, CD4089, CD408, CD40, CD4

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Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4089BNSR 描述

***as Instruments: CMOS Binary Rate Multiplier 16-SO -55 to 125

***ical: Multiplier -55C to 125C 16-Pin SOP T/R

***ark: Timer IC; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Leaded Process Compatible:Yes; Package/Case:16-SOP; Peak Reflow Compatible (260 C):Yes; Logic Family:CD4000 ;RoHS Compliant: Yes

***ASI: CD4089B is a low-power 4-bit digital rate multiplier that provides an output pulse rate that is the clock-input-pulse rate multiplied by 1/16 times the binary input. For example, when the binary input number is 13, there will be 13 output pulses for every 16 input pulses. This device may be used in conjunction with an up/down counter and control logic used to perform arithmetic operations (adds, subtract, divide, raise to a power), solve algebraic and differential equations, generate natural logarithms and trigometric functions, A/D and D/A conversions, and frequency division.

***: For words of more than 4-bits, CD4089B devices may be cascaded in two different mode: an Add mode and a Multiply mode (see Figs. 14 and 15). In the Add mode some of the gaps left by the more significant unit at the count of 15 are filled in by the less significant units. For example, when two units are cascaded in the Add mode and programmed to 11 and 13, respectively, the more significant unit will have 11 output pulses for every 16 input pulses and the other unit will have 13 output pulses for every 256 input pulses for a total of

***AS INST: In the Multiply mode the fraction programmed into the first rate multipliers multiplied by the fraction programmed into the second multiplier. Thus the output rate will be

***ASIN: The CD4089B has an internal synchronous 4-bit counter which, together with one of the four binary input bits, produces pulse trains as shown in Fig. 2.

***AS: If more than one binary input bit is high, the resulting pulse train a combination of the separate pulse trains as shown in Fig. 2.

***NS: The CD4089B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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