SN74AXC1T45DRLR

Mfr. #:: SN74AXC1T45DRLR
描述:: Bus Transceivers Single-bit dual-supply bus transceiver 6-SOT-5X3 -40 to 125
生命週期:: 製造商新產品
數據表:: SN74AXC1T45DRLR 數據表
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更多信息:: SN74AXC1T45DRLR 更多信息 SN74AXC1T45DRLR Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 總線收發器

RoHS：: Y

邏輯系列：: AXC

高電平輸出電流：: - 12 mA

低電平輸出電流：: 12 mA

傳播延遲時間：: 173 ns

電源電壓 - 最大值：: 3.6 V

電源電壓 - 最小值：: 0.65 V

最低工作溫度：: - 40 C

最高工作溫度：: + 125 C

包裝/案例：: SOT-5X3-6

打包：: 捲軸

電路數量：: 1 Circuit

工作溫度範圍：: - 40 C to + 125 C

產品：: 總線收發器

系列：: SN74AXC1T45

品牌：: 德州儀器

安裝方式：: 貼片/貼片

通道數：: 1 Channel

輸入行數：: 1 Input

電源電流 - 最大值：: 8.5 uA

開發套件：: AVCLVCDIRCNTRL-EVM

工作電源電流：: 8.5 uA

極性：: 同相

產品類別：: 總線收發器

出廠包裝數量：: 4000

子類別：: 邏輯 IC

單位重量：: 0.000113 oz

Tags: SN74AXC1, SN74AX, SN74A, SN74, SN7

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74AXC1T45DRLR 描述

***as Instruments: Single-bit dual-supply bus transceiver 6-SOT-5X3 -40 to 125

***: e4 ACTIVE (Last Updated: 1week ago) 74AXC1T45 Nickel/Palladium/Gold (Ni/Pd/Au) level shifter translator 0.7V 600mum 500Mbps -40C~125C TA

***nell: TRANSCEIVER W/ VOLT TRANSLATION, SOT-563; Type de buffer: Transceiver, Adaptateur de niveau, Non Inverseur; Famille Logique/ Numéro de base: 74AXC1T45; Type de boîtier CI logique: SOT-563; Nombre de broches: 6Broche(s); Tens

***ment14 APAC: TRANSCEIVER W/ VOLT TRANSLATION, SOT-563; Logic Device Type:Transceiver, Translating, Non Inverting; Logic Family / Base Number:74AXC1T45; Logic Case Style:SOT-563; No. of Pins:6Pins; Supply Voltage Min:650mV; Supply Voltage Max:3.6V; Logic IC Family:74AXC; Logic IC Base Number:741T45; Operating Temperature Min:-40°C; Operating Temperature Max:125°C; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 1 - Unlimited; SVHC:No SVHC (15-Jan-2019)

***AS INTRUMENTS: The SN74AXC1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V.

***NS: The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

***AS INST: This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

***AS INSTRUMENTS INCORPORATED: The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

***INS: The glitch suppression circuitry enables either supply rail to be powered on or off in any order, providing robust power sequencing performance.

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