SN75ALS085DWRG4

Mfr. #:: SN75ALS085DWRG4
描述:: Bus Transceivers Dual Driver Receiver
生命週期:: 製造商新產品
數據表:: SN75ALS085DWRG4 數據表
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更多信息:: SN75ALS085DWRG4 更多信息 SN75ALS085DWRG4 Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 總線收發器

RoHS：: Y

最低工作溫度：: 0 C

最高工作溫度：: + 70 C

包裝/案例：: SOIC-24

打包：: 捲軸

功能：: 總線收發器

高度：: 2.35 mm

長度：: 15.4 mm

寬度：: 7.52 mm

品牌：: 德州儀器

接口類型：: IEEE-802.3

安裝方式：: 貼片/貼片

產品類別：: 總線收發器

出廠包裝數量：: 1

子類別：: 邏輯 IC

單位重量：: 0.022025 oz

Tags: SN75ALS085DWR, SN75ALS085D, SN75ALS08, SN75ALS0, SN75AL, SN75A, SN75, SN7

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN75ALS085DWRG4 描述

***ser: Line Circuit Interface ICs Dual Driver Receiver

***i-Key: IC DRVR/RCVR DUAL INTRFAC 24SOIC

***as Instruments: The SN75ALS085 is a high-speed, advanced low-power Schottky, dual-channel driver/receiver device designed for use in the AUI of ANSI/IEEE Std 802.3-1988. The two drivers on the device drive a 78- balanced, terminated twisted-pair transmission line up to a maximum length of 50 meters. In the off (idle) state, the drivers maintain minimal differential output voltage on the twisted-pair line and, at the same time, remain within the required output common-mode range. With the driver enable (TXEN) high, upon receiving the first falling edge into the driver input, the differential outputs rise to full-amplitude output levels within 25 ns. The output amplitude is maintained for the remainder of the packet. After the last positive packet edge is transmitted into the driver, the driver maintains a minimum of 70% full differential output for a minimum of 200 ns, then decays to a minimum level for the reset (idle) condition within 8 us. Disabling the driver by taking the driver enable low also forces the output into the idle condition after the normal 8-us timeout. While operating, the drivers are able to withstand a set of fault conditions and not suffer damage due to the faults being applied. The drivers power up in the idle state to ensure that no activity is placed on the twisted-pair cable, which could be interpreted as network traffic. The line receiver squelch function interfaces to a differential twisted-pair line terminated external to the device. The receiver squelch circuit allows differential receive signals to pass through, as long as the input amplitude and pulse duration are greater than the minimum squelch threshold. This ensures a good signal-to-noise ratio while the data path is active and prevents system noise from causing false data transitions during line shutdown and line-idle conditions. The receiver outputs (RXO) default to a high level and the receiver-enable (RXEN) outputs default to a low level while the squelch function is blocking the data path through the receiver (idle). The line receiver squelch becomes active within 50 ns when the input squelch threshold is exceeded. RXEN is driven high when the squelch circuit allows data to pass through the receiver. The receiver squelch circuit also can withstand a set of fault conditions while operating, without causing permanent damage to the device. The purpose of the loop functions is to provide a means by which system data-path verification can be done to isolate faulty interfaces and assist in network diagnosis. The LOOP pins are TTL compatible and must be held high for normal operation. When LOOP1\ is taken low, the output of driver 1 (TXO1) immediately goes into the idle state. Also, the input to receiver 1 is ignored, and a path from a transmit input (TXI1) to RXO1 is established. When LOOP1\ is taken back high, driver 1 and receiver 1 revert back to their normal operation. When LOOP2\ is taken low, a similar data path is established between TXI1 and RXO2. TXEN1 must be high for the loop functions to operate, and TXEN1 can be used to gate the loop function if desired. During loop operation, the respective RXEN reflects the status of TXEN1. The SN75ALS085 is characterized for operation from 0C to 70C.

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