AS4C128M8D3LB-12BCN

Mfr. #:: AS4C128M8D3LB-12BCN
製造商:: Alliance Memory
描述:: IC DRAM 1G PARALLEL 78FBGA
生命週期:: 製造商新產品
數據表:: AS4C128M8D3LB-12BCN 數據表
交貨:: DHL FedEx Ups TNT EMS
支付:: T/T Paypal Visa MoneyGram Western Union
ECAD Model:
更多信息:: AS4C128M8D3LB-12BCN 更多信息

產品屬性
屬性值

Tags: AS4C128M8D3LB-12BC, AS4C128M8D3LB, AS4C128M8D3L, AS4C128M8D3, AS4C128M8, AS4C12, AS4C1, AS4C, AS4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AS4C128M8D3LB-12BCN 評級和評論

A***v

One of all was bad.The rest are good

2019-07-25

A***v

Parcel received at home, all as in description. 100 pcs. I advise!

2019-06-10

AS4C128M8D3LB-12BCN 描述

***et: DRAM Chip DDR3 SDRAM 1Gbit 128M X 8 78-Pin FBGA Tray

***i-Key: IC DRAM 1G PARALLEL 78FBGA

AS4C128M8D3LB-12BCN 更多信息

DDR3 Synchronous DRAM: Alliance Memory DDR3 Synchronous DRAM (SDRAM) achieve high speed double-data-rate transfer rates of up to 1600 Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3 DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V ± 0.075V power supply and are available in BGA packages.

DDR3L SDRAM: Alliance Memory DDR3L SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins.

Market price

型號	製造商	描述	庫存	價格
AS4C128M8D3LB-12BCN DISTI # 1450-1449-ND	Alliance Memory Inc	IC DRAM 1G PARALLEL 78FBGA RoHS: Compliant Min Qty: 242 Container: Tray	Temporarily Out of Stock	1210:$3.6968 726:$3.8884 484:$4.0370 242:$4.0522
AS4C128M8D3LB-12BCNTR DISTI # AS4C128M8D3LB-12BCNTR-ND	Alliance Memory Inc	IC DRAM 1G PARALLEL 78FBGA RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	2500:$3.7353
AS4C128M8D3LB-12BCN DISTI # AS4C128M8D3LB-12BCN	Alliance Memory Inc	DRAM Chip DDR3 SDRAM 1Gbit 128M X 8 78-Pin FBGA Tray - Trays (Alt: AS4C128M8D3LB-12BCN) RoHS: Compliant Min Qty: 242 Container: Tray	Americas - 0	2420:$2.7900 1452:$2.8900 968:$2.9900 242:$3.0900 484:$3.0900
AS4C128M8D3LB-12BCNTR DISTI # AS4C128M8D3LB-12BCNTR	Alliance Memory Inc	DRAM Chip DDR3 SDRAM 1Gbit 128M X 8 78-Pin FBGA T/R - Tape and Reel (Alt: AS4C128M8D3LB-12BCNTR) RoHS: Compliant Min Qty: 2500 Container: Reel	Americas - 0	25000:$2.7900 10000:$2.8900 15000:$2.8900 5000:$2.9900 2500:$3.1900
AS4C128M8D3LB-12BCN DISTI # 913-A4C1288D3LB12BCN	Alliance Memory Inc	DRAM 1G 1.35V 800MHz 128Mx8 DDR3 E-Temp RoHS: Compliant	242	1:$5.1200 10:$4.6400 25:$4.5400 50:$4.5100 100:$4.0500 250:$4.0300 500:$3.8800 1000:$3.6900 2000:$3.5200
AS4C128M8D3LB-12BCNTR DISTI # 913-4C1288D3LB12BCNT	Alliance Memory Inc	DRAM 1G 1.35V 800MHz 128Mx8 DDR3 E-Temp RoHS: Compliant	0	2500:$3.6000
AS4C128M8D3LB-12BCN	Alliance Memory Inc	1GDDR3128M x 81.35V96-ball BGA1600 MHzCommerical Temp	449

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