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AD9695BCPZ-625

AD9695BCPZ-625
Mfr. #:
AD9695BCPZ-625
製造商:
Analog Devices Inc.
描述:
Analog to Digital Converters - ADC Dual 14Bit 1.3G SPS 625MPSP ADC w/JESD20
生命週期:
製造商新產品
數據表:
AD9695BCPZ-625 數據表
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更多信息:
AD9695BCPZ-625 更多信息 AD9695BCPZ-625 Product Details
產品屬性
屬性值
製造商：
德州儀器
產品分類：
模數轉換器 - ADC
RoHS：
Y
系列：
ADS1261
安裝方式：
貼片/貼片
包裝/案例：
VQFN-32
解決：
24 bit
通道數：
10 Channel
採樣率：
40 kS/s
輸入類型：
差分/單端
接口類型：
SPI
建築學：
Sigma-Delta
參考類型：
外部內部
模擬電源電壓：
4.75 V to 5.25 V
數字電源電壓：
2.7 V to 5.25 V
最低工作溫度：
- 40 C
最高工作溫度：
+ 125 C
打包：
捲軸
特徵：
50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor
轉換器數量：
1 Converter
能量消耗：
24 mW
類型：
Δ-Σ ADC
品牌：
德州儀器
關掉：
不停機
增益誤差：
0.05 %
產品類別：
ADC - 模數轉換器
出廠包裝數量：
250
子類別：
數據轉換器 IC
單位重量：
0.002021 oz
Tags
AD9695B, AD9695, AD969, AD96, AD9
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
2-Channel Dual ADC Pipelined 625Msps 14-bit JESD204B 64-Pin LFCSP EP Tray
***i-Key
IC ADC 14BIT PIPELINED 64LFCSP
***hardson RFPD
LINEAR ICS, OTHER
***log Devices
The AD9695 is a dual, 14-bit, 1300 MSPS/625 MSPS analog-todigital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 2 GHz. The −3 dB bandwidth of the ADC input is 2 GHz. The AD9695 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package. The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of multiple signal processing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and decimation filters. The NCO has the option to select up to 16 preset bands over the general-purpose input/output (GPIO) pins, or use a coherent fast frequency hopping mechanism for band selection. Operation of the AD9695 between the DDC modes is selectable via SPI-programmable profiles. In addition to the DDC blocks, the AD9695 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9695 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC. The user can configure the Subclasss 1 JESD204B-based high speed serialized output using either one lane, two lanes, or four lanes, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF± and SYNCINB± input pins. The AD9695 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 3-wire serial port interface (SPI) and or PDWN/STBY pin. The AD9695 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +105°C junction temperature range. This product may be protected by one or more U.S. or international patents. Note that, throughout this data sheet, multifunction pins, such as FD_A/GPIO_A0, are referred to either by the entire pin name or by a single function of the pin, for example, FD_A, when only that function is relevant. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 16 Gbps. Wide, full power bandwidth supports intermediate frequency (IF) sampling of signals up to 2 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management. Applications Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, WCDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receiver Instrumentation Oscilloscopes Spectrum analyzers Network analyzers Integrated RF test solutions Radar Electronic support measures, electronic counter measures, and electronic counter-counter measures High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths Hybrid fiber coaxial digital reverse path receivers Wideband digital predistortion
AD969x 14-Bit ADCs
Analog Devices AD9690, AD9691, AD9694, and AD9695 14-bit Analog-to-Digital Converters (ADC) are JESD204B ADCs designed for sampling wide bandwidth analog signals up to 2GHz. The devices include an on-chip buffer and sample-and-hold circuit for low power, small size, and ease-of-use. The  low-power consumption ADC cores have a multistage, differential pipelined architecture with integrated, output-error correction logic. Each device includes wide bandwidth inputs to support a variety of user-selectable input ranges. The ADC data outputs are internally connected to two digital downconverters (DDCs). The DDC consists of four cascaded signal-processing stages, a 12-bit frequency translator (NCO), and four half-band decimation filters.
Analog to Digital Converters ADI SLP
High-Speed Converters
Analog Devices offers the industry's largest portfolio high speeddigital-to-analog converter products including wideband radio frequency(RF), intermediate frequency (IF) signal processing and general purposebaseband classes, which are widely employed in wired and wirelesscommunications, instrumentation, radar, electronic warfare and otherapplications.Learn More
型號 製造商 描述 庫存 價格
AD9695BCPZ-625
DISTI # V36:1790_18647835		Analog Devices IncDUAL 14BIT 1.3G SPS/625MPSP AD117
  • 1:$514.9100
AD9695BCPZ-625
DISTI # V99:2348_18647835		Analog Devices IncDUAL 14BIT 1.3G SPS/625MPSP AD0
    AD9695BCPZ-625
    DISTI # AD9695BCPZ-625-ND    		Analog Devices IncDUAL 14BIT 1.3G SPS/625MPSP ADC
    RoHS: Compliant
    Min Qty: 1
    Container: Tray    		42In Stock
    • 1:$558.5700
    AD9695BCPZ-625
    DISTI # 32708135    		Analog Devices IncDUAL 14BIT 1.3G SPS/625MPSP AD117
    • 1:$514.9100
    AD9695BCPZ-625
    DISTI # 584-AD9695BCPZ-625    		Analog Devices IncAnalog to Digital Converters - ADC Dual 14Bit 1.3G SPS 625MPSP ADC w/JESD20
    RoHS: Compliant    		3
    • 1:$522.1300
    • 5:$509.2100
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    可用性
    庫存:
    Available
    訂購:
    1986
    輸入數量:
    AD9695BCPZ-625的當前價格僅供參考，如果您想獲得最優惠的價格，請提交查詢或直接發送電子郵件至我們的銷售團隊[email protected]
    參考價格（美元）
    數量
    單價
    小計金額
    1
    US$522.13
    US$522.13
    5
    US$509.21
    US$2 546.05
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