SN65LVDS93BDGGR

SN65LVDS93BDGGR
Mfr. #:
SN65LVDS93BDGGR
描述:
Serializers & Deserializers - Serdes FLATLINK TRANSMITTER AND RECEIVER
生命週期:
製造商新產品
數據表:
SN65LVDS93BDGGR 數據表
交貨:
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ECAD Model:
更多信息:
SN65LVDS93BDGGR 更多信息 SN65LVDS93BDGGR Product Details
產品屬性
屬性值
製造商:
德州儀器
產品分類:
序列化器和反序列化器 - Serdes
類型:
序列化器
數據速率:
2.38 Gb/s
輸入類型:
LVTTL
輸出類型:
LVDS
輸入數量:
28 Input
輸出數量:
4 Output
工作電源電壓:
3.3 V
最低工作溫度:
- 40 C
最高工作溫度:
+ 85 C
安裝方式:
貼片/貼片
包裝/案例:
TSSOP-56
打包:
捲軸
產品:
Serdes 發射器
系列:
SN65LVDS93B
品牌:
德州儀器
工作電源電流:
75.1 mA
產品類別:
序列化器和反序列化器 - Serdes
出廠包裝數量:
2000
子類別:
接口 IC
電源電壓 - 最大值:
3.6 V
電源電壓 - 最小值:
3 V
Tags
SN65LVDS93, SN65LVDS9, SN65LVDS, SN65LVD, SN65LV, SN65L, SN65, SN6
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INSRUMENT
The SN65LVDS93B LVDS SerDes (serializer/deserializer) transmitter contains four 7-bit parallel load serial-out shift registers, a 7 × clock synthesizer, and five low-voltage differential signaling (LVDS) drivers in a single integrated circuit. These functions allow synchronous transmission of 28 bits of single-ended LVTTL data over five balanced-pair conductors for receipt by a compatible receiver, such as the DS90CR286A and SN65LVDS94.
***AS INSTR
When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected through the clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times and then used to serially unload the data registers in 7-bit slices. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.
***AS INSTRUMENTS INCORPORATED
The SN65LVDS93B device requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the users. The only user intervention is selecting a clock rising edge by inputting a high level to CLKSEL or a falling edge with a low-level input and the possible use of the shutdown/clear (SHTDN) signal. SHTDN is an active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low level on this signal clears all internal registers at a low level.
***XS
The SN65LVDS93B is characterized for operation over ambient air temperatures of –40°C to 85°C.
SN65LVDS93B/SN65LVDS93B-Q1 LVDS SerDes Transmitter
OMO Electronic SN65LVDS93B / SN65LVDS93B-Q1 LVDS SerDes (Serializer/Deserializer) Transmitter contains four 7-bit parallel load serial-out shift registers. The device also has a 7 × clock synthesizer and five low-voltage differential signaling (LVDS) drivers. This is all included in a single integrated circuit. These functions allow synchronous transmission of 28 bits of single-ended LVTTL data over five balanced-pair conductors for receipt by a compatible receiver, such as the DS90CR286A and SN65LVDS94. The SN65LVDS93B-Q1 devices are AEC-Q100 qualified for automotive applications.
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可用性
庫存:
Available
訂購:
5500
輸入數量:
SN65LVDS93BDGGR的當前價格僅供參考,如果您想獲得最優惠的價格,請提交查詢或直接發送電子郵件至我們的銷售團隊[email protected]
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