DC1525A-K

Mfr. #:: DC1525A-K
製造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools LTC2171-12 - 12-Bit, 40Msps, 1.8V Quad
生命週期:: 製造商新產品
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ECAD Model:
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產品屬性
屬性值

製造商：: 模擬設備公司

產品分類：: 數據轉換IC開發工具

RoHS：: Y

產品：: 演示板

類型：: 模數轉換器

工具用於評估：: LTC2171-12

工作電源電壓：: 3 V to 6 V

系列：: LTC2171

品牌：: 模擬設備公司

產品類別：: 數據轉換IC開發工具

出廠包裝數量：: 1

子類別：: 開發工具

Tags: DC1525A, DC1525, DC152, DC15, DC1

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC1525A-K 描述

***va Crawler: LTC2171-12 | 12-Bit, 40Msps, 1.8V Quad Serial ADC, 5MHz < Ain < 170MHz, req DC1371 and DC1075

***ark: 12Bit Analog To Digital-Adc Evaluation Board, Requires Dc890 & Lvds_Xfmr; Silicon Manufacturer:linear Technology; Silicon Core Number:ltc2171-12; No. Of Bits:12Bit; Sample Rate:40Msps; Kit Application Type:data Converter Rohs Compliant: Na

***log Devices: The LTC2172-12/LTC2171-12/LTC2170-12 are 4-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 71dB SNR and 90dB spurious free dynamic range (SFDR). An ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specifications include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode) or one bit at a time (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2171-12 12 LTC2171-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing

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