MC100LVEL34DG

Mfr. #:: MC100LVEL34DG
製造商:: ON Semiconductor
描述:: Clock Generators & Support Products HF ECL CLOCK GEN
生命週期:: 製造商新產品
數據表:: MC100LVEL34DG 數據表
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HTML Datasheet:: MC100LVEL34DG Datasheet MC100LVEL34DG Datasheet (P4-P6)MC100LVEL34DG Datasheet (P7-P9)MC100LVEL34DG Datasheet (P10)
ECAD Model:

產品屬性
屬性值

製造商：: 安森美半導體

產品分類：: 時鐘發生器和支持產品

RoHS：: Y

系列：: MC100LVEL34

類型：: 時鐘發生器

最大輸出頻率：: 1100 MHz

輸出數量：: 3 Output

工作電源電壓：: 4.2 V to 5.7 V

工作電源電流：: 39 mA

最低工作溫度：: - 40 C

最高工作溫度：: + 85 C

安裝方式：: 貼片/貼片

包裝/案例：: SOIC-16

打包：: 管子

品牌：: 安森美半導體

抖動：: 1 ps

產品類別：: 時鐘發生器

出廠包裝數量：: 48

子類別：: 時鐘和定時器 IC

單位重量：: 0.023492 oz

Tags: MC100LVEL34, MC100LVEL3, MC100LVEL, MC100L, MC100, MC10, MC1

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

MC100LVEL34DG 描述

***et Europe: Clock Generator 16-Pin SOIC Rail

***ical: 3.3V ECL /2, /4, /8 Clock Generation Chip

***ser: Amplifiers- Audio HF ECL CLOCK GEN

***emi: 3.3 V ECL ÷·2, ÷·4, ÷·8 Divider

***th Star Micro: The MC100LVEL34 is a low skew 2 4 8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other therefore the common output edges are all precisely aligned. The VBB pin an internally generated voltage supply is available to this device only. For single-ended input conditions the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used VBB should be left open. The common enable (EN bar) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the input clock; therefore all associated specification limits are referenced to the negative edge of the clock input. Upon start-up the internal flip-flops will attain a random state; the master reset (MR) input allows for the synchronization of the internaldividers as well as multiple LVEL34s in a system.

Market price

型號	製造商	描述	庫存	價格
MC100LVEL34DG DISTI # MC100LVEL34DGOS-ND	ON Semiconductor	IC CLOCK GEN ECL 2/4/8 16SOIC RoHS: Compliant Min Qty: 48 Container: Tube	Limited Supply - Call
MC100LVEL34DG	ON Semiconductor	RoHS: Not Compliant	856	1000:$5.3100 500:$5.5900 100:$5.8200 25:$6.0700 1:$6.5300
MC100LVEL34DTG DISTI # 863-MC100LVEL34DTG	ON Semiconductor	Clock Generators & Support Products 3.3V ECL Clock Generator RoHS: Compliant	97	1:$7.7400 10:$6.9900 25:$6.6700 100:$5.7900 250:$5.5300 500:$5.0400 1000:$4.3900
MC100LVEL34DR2G DISTI # 863-MC100LVEL34DR2G	ON Semiconductor	Clock Generators & Support Products HF ECL CLOCK GEN RoHS: Compliant	0	1:$7.7400 10:$6.9900 25:$6.6700 100:$5.7900 250:$5.5300 500:$5.0400 1000:$4.3900 2500:$4.2300
MC100LVEL34DG DISTI # 863-MC100LVEL34DG	ON Semiconductor	Clock Generators & Support Products HF ECL CLOCK GEN RoHS: Compliant	0
MC100LVEL34D DISTI # 863-MC100LVEL34D	ON Semiconductor	Clock Generators & Support Products 3.3V ECL Clock RoHS: Not compliant	0

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