AD9572ACPZLVD-RL

Mfr. #:: AD9572ACPZLVD-RL
製造商:: Analog Devices Inc.
描述:: Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output
生命週期:: 製造商新產品
數據表:: AD9572ACPZLVD-RL 數據表
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更多信息:: AD9572ACPZLVD-RL 更多信息 AD9572ACPZLVD-RL Product Details

產品屬性
屬性值

製造商: 模擬設備公司

產品分類: 時鐘/定時 - 時鐘發生器、PLL、頻率合成器

系列: AD9572

類型: 時鐘發生器、扇出分配、多路復用器

打包: Digi-ReelR 替代包裝

安裝方式: 貼片/貼片

包裝盒: LFCSP-40

工作溫度: -40°C ~ 85°C

安裝型: 表面貼裝

輸出類型: LVPECL

電壓供應: 2.97 V ~ 3.63 V

供應商-設備-包: 40-LFCSP-WQ (6x6)

鎖相環: 是的

輸入: 水晶

輸出: CMOS、LVDS、LVPECL

電路數: 1

比率-輸入:輸出: 1899/12/30 1:07:00

差分輸入：輸出: 否/是

最大頻率: 156.25MHz

除法器乘法器: 是/否

最高工作溫度: + 85 C

最低工作溫度: - 40 C

最大電源電壓: 3.6 V

最大輸出頻率: 156.25 MHz

乘除因子: 1

Tags: AD9572ACPZL, AD9572, AD957, AD95, AD9

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AD9572ACPZLVD-RL 描述

***et Europe: PLL Frequency Synthesizer Dual 40-Pin LFCSP EP T/R

***i-Key: IC PLL CLOCK GEN 25MHZ 40LFCSP

***log Devices: The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequencysynthesizers to maximize network performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. The PLL section consists of a low noise phase frequency detector (PFD), a precision charge pump (CP), a low phase noise voltage controlled oscillator (VCO), and a preprogrammed feedback divider and output divider. By connecting an external crystal or reference clock to the REFCLK pin, frequencies up to 156.25 MHz can be locked to the input reference. Each output divider and feedback divider ratio is preprogrammed for the required output rates. A second PLL also operates as an integer-N synthesizer and drives two LVPECL or LVDS output buffers for 106.25 MHz operation. No external loop filter components are required, thus conserving valuable design time and board space. The AD9572 is available in a 40-lead, 6 mm × 6 mm lead frame chip scale package (LFCSP) and can be operated from a single 3.3 V supply. The temperature range is -40°C to +85°C. APPLICATIONS Fiber channel line cards, switches, and routers Gigabit Ethernet/PCIe support included Low jitter, low phase noise clock generation

AD9572ACPZLVD-RL 更多信息

Clock & Timing ADI SLP

Market price

型號	製造商	描述	庫存	價格
AD9572ACPZLVD-RL DISTI # AD9572ACPZLVD-RLTR-ND	Analog Devices Inc	IC PLL CLOCK GEN 25MHZ 40LFCSP RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	2500:$6.8864
AD9572ACPZLVD DISTI # 584-AD9572ACPZLVD	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	14	1:$11.3000 10:$10.2500 25:$9.6300 50:$9.2800 100:$8.3400 250:$7.7100 500:$7.2500 1000:$6.5900
AD9572ACPZLVD-R7 DISTI # 584-AD9572ACPZLVD-R7	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	0	750:$6.5900
AD9572ACPZLVD-RL DISTI # 584-AD9572ACPZLVD-R	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	0	2500:$6.5900

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	Mfr.#: AD9572ACPZLVD OMO.#: OMO-AD9572ACPZLVD-ANALOG-DEVICES-INC-ADI	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output