AS4C256M8D3LB-12BCNTR

Mfr. #:: AS4C256M8D3LB-12BCNTR
製造商:: Alliance Memory
描述:: IC DRAM 2G PARALLEL 78FBGA
生命週期:: 製造商新產品
數據表:: AS4C256M8D3LB-12BCNTR 數據表
交貨:: DHL FedEx Ups TNT EMS
支付:: T/T Paypal Visa MoneyGram Western Union
ECAD Model:
更多信息:: AS4C256M8D3LB-12BCNTR 更多信息

產品屬性
屬性值

Tags: AS4C256M8D3LB, AS4C256M8D3L, AS4C256M8D3, AS4C256M8, AS4C256M, AS4C25, AS4C2, AS4C, AS4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AS4C256M8D3LB-12BCNTR 描述

***et: DRAM Chip DDR3 SDRAM 2Gbit 256M x 8 78-Pin FBGA T/R

***i-Key: IC DRAM 2G PARALLEL 78FBGA

AS4C256M8D3LB-12BCNTR 更多信息

DDR3 Synchronous DRAM: Alliance Memory DDR3 Synchronous DRAM (SDRAM) achieve high speed double-data-rate transfer rates of up to 1600 Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3 DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V ± 0.075V power supply and are available in BGA packages.

DDR3L SDRAM: Alliance Memory DDR3L SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins.

Market price

型號	製造商	描述	庫存	價格
AS4C256M8D3LB-12BCNTR DISTI # AS4C256M8D3LB-12BCNTR-ND	Alliance Memory Inc	IC DRAM 2G PARALLEL 78FBGA RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	2500:$4.4651
AS4C256M8D3LB-12BCNTR DISTI # AS4C256M8D3LB-12BCNTR	Alliance Memory Inc	DRAM Chip DDR3 SDRAM 2Gbit 256M x 8 78-Pin FBGA T/R - Tape and Reel (Alt: AS4C256M8D3LB-12BCNTR) Min Qty: 2500 Container: Reel	Americas - 0	25000:$3.5900 15000:$3.6900 10000:$3.7900 5000:$3.8900 2500:$4.0900
AS4C256M8D3LB-12BCN DISTI # 913-4C256M8D3LB12BCN	Alliance Memory Inc	DRAM 2G 1.35V 256M x 8 DDR3 E-Temp RoHS: Compliant	225	1:$6.5000 10:$6.0800 25:$5.9700 50:$5.4500 100:$5.0700 250:$5.0500 500:$4.7400 1000:$4.5400
AS4C256M8D3LB-12BCNTR DISTI # 913-4C2568D3LB12BCNT	Alliance Memory Inc	DRAM 2G 1.35V 256M x 8 DDR3 E-Temp RoHS: Compliant	0	2500:$4.6800

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