SN74LVC823ADWRE4

SN74LVC823ADWRE4
Mfr. #:
SN74LVC823ADWRE4
描述:
Flip Flops 9-Bit Bus Intfc FlipFlop W/3-St Otpt
生命週期:
製造商新產品
數據表:
SN74LVC823ADWRE4 數據表
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ECAD Model:
更多信息:
SN74LVC823ADWRE4 更多信息 SN74LVC823ADWRE4 Product Details
產品屬性
屬性值
製造商:
德州儀器
產品分類:
人字拖
RoHS:
Y
電路數量:
1
邏輯系列:
74LV
邏輯類型:
總線接口觸發器
極性:
同相
輸入類型:
單端
輸出類型:
單端
傳播延遲時間:
8.9 ns
高電平輸出電流:
- 24 mA
低電平輸出電流:
24 mA
電源電壓 - 最小值:
1.65 V
電源電壓 - 最大值:
3.6 V
最低工作溫度:
- 40 C
最高工作溫度:
+ 85 C
安裝方式:
貼片/貼片
包裝/案例:
SOIC-24
打包:
捲軸
功能:
D型總線接口
高度:
2.35 mm
長度:
15.4 mm
靜態電流:
10 uA
寬度:
7.52 mm
品牌:
德州儀器
通道數:
9
輸入行數:
9
輸出線數:
3
工作電源電壓:
1.65 V to 3.6 V
產品類別:
人字拖
重置類型:
主復位
出廠包裝數量:
1
子類別:
邏輯 IC
單位重量:
0.038731 oz
Tags
SN74LVC823ADWR, SN74LVC823ADW, SN74LVC823AD, SN74LVC823, SN74LVC82, SN74LVC8, SN74LVC, SN74LV, SN74L, SN74, SN7
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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 24SOIC
***eco
9-BIT BUS INTERFACE FF W/3-S, CLR
***as Instruments
This 9-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC823A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. With the clock-enable (CLKEN)\ input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR)\ input low causes the nine Q outputs to go low, independently of the clock. A buffered output-enable (OE)\ input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or the high-impedance state. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
型號 描述 庫存 價格
SN74LVC823ADWRE4
DISTI # SN74LVC823ADWRE4-ND
IC FF D-TYPE SNGL 9BIT 20SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVC823ADWRE4
    DISTI # 595-SN74LVC823ADWRE4
    Flip Flops 9-Bit Bus Intfc FlipFlop W/3-St Otpt
    RoHS: Compliant
    0
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      全新原裝
      可用性
      庫存:
      Available
      訂購:
      2500
      輸入數量:
      SN74LVC823ADWRE4的當前價格僅供參考,如果您想獲得最優惠的價格,請提交查詢或直接發送電子郵件至我們的銷售團隊[email protected]
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