CAVCH4T245MRSVREP

Mfr. #:: CAVCH4T245MRSVREP
描述:: Translation - Voltage Levels EP 4B Dual-Sply Bus Transc
生命週期:: 製造商新產品
數據表:: CAVCH4T245MRSVREP 數據表
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更多信息:: CAVCH4T245MRSVREP 更多信息 CAVCH4T245MRSVREP Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 轉換 - 電壓電平

RoHS：: Y

傳播延遲時間：: 6.9 ns

電源電壓 - 最大值：: 3.6 V

電源電壓 - 最小值：: 1.2 V

最低工作溫度：: - 55 C

最高工作溫度：: + 125 C

安裝方式：: 貼片/貼片

包裝/案例：: UQFN-16

打包：: 捲軸

數據速率：: 380 Mb/s

特徵：: 部分斷電 (Ioff)、過壓耐受輸入、總線保持

工作溫度範圍：: - 55 C to + 125 C

輸出類型：: 3-State

系列：: SN74AVCH4T245-EP

品牌：: 德州儀器

邏輯系列：: AVC

邏輯類型：: CMOS

高電平輸出電流：: 12 mA

低電平輸出電流：: 12 mA

產品類別：: 轉換 - 電壓電平

出廠包裝數量：: 3000

子類別：: 邏輯 IC

第 # 部分別名：: V62/09618-01XE

單位重量：: 0.001443 oz

Tags: CAVC, CAV

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CAVCH4T245MRSVREP 描述

***AS INSTRUMENT: This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

***TEXAS: The SN74AVCH4T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

***AS INSTUMENTS: The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.

***: This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

***AS INS: The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

***AS INTRUMENTS: Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

***AS: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

CAVCH4T245MRSVREP 更多信息

Logic Solutions: OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More

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