SN74GTLP1394DR

Mfr. #:: SN74GTLP1394DR
描述:: Translation - Voltage Levels 2bit Bus
生命週期:: 製造商新產品
數據表:: SN74GTLP1394DR 數據表
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更多信息:: SN74GTLP1394DR 更多信息 SN74GTLP1394DR Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 轉換 - 電壓電平

RoHS：: Y

傳播延遲時間：: 8.6 ns

電源電壓 - 最大值：: 3.45 V

電源電壓 - 最小值：: 3.15 V

最低工作溫度：: - 40 C

最高工作溫度：: + 85 C

安裝方式：: 貼片/貼片

包裝/案例：: SOP-16

打包：: 捲軸

特徵：: Partial power down (Ioff), Over-voltage tolerant inputs, Power up 3 state, Bias Vcc, Variable outpu

工作溫度範圍：: - 40 C to + 85 C

系列：: SN74GTLP1394

品牌：: 德州儀器

邏輯系列：: GTLP

工作電源電流：: 20 mA

產品類別：: 轉換 - 電壓電平

出廠包裝數量：: 2500

子類別：: 邏輯 IC

單位重量：: 0.004998 oz

Tags: SN74GTLP1394D, SN74GTLP1394, SN74GTLP1, SN74GTLP, SN74G, SN74, SN7

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74GTLP1394DR 評級和評論

M***v

Received order

2019-01-11

R***y

Capacitors below nominal, dispute is notBegan to open because of the low cost, and so useless purchase, wrote to the seller, he did not even answer.

2019-03-24

E**f

2019-07-16

SN74GTLP1394DR 描述

*** Stop Electro: Bus Transceiver, GTLP Series, 1-Func, 2-Bit, Configurable Output, CMOS, PDSO16

***as Instruments: 2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity 16-SOIC -40 to 85

***ical: Bus XCVR Single 2-CH 3-ST 16-Pin SOIC T/R

***i-Key: IC TRANSLTR BIDIRECTIONAL 16SOIC

***or: SN74GTLP1394 2-BIT LVTTL-TO-GTLP

***ark: Specialty Logic IC; Output Current:100mA; No. of Channels:2; Input Level:2V; Output Level:2.4V; Logic Case Style:SOIC; No. of Pins:16; Supply Voltage Range:3.15V to 3.45V; Operating Temperature Range:-40°C to +85°C ;RoHS Compliant: Yes

***AS INSRUMENT: The SN74GTLP1394 is a high-drive, 2-bit, 3-wire bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It allows for transparent and inverted transparent modes of data transfer with separate LVTTL input and LVTTL output pins, which provides a feedback path for control and diagnostics monitoring. The device provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels, and is especially designed to work with the Texas Instruments 1394 backplane physical-layer controllers. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC circuitry, and TI-OPC circuitry. Improved GTLP OEC and TI-OPC circuitry minimizes bus-settling time and have been designed and tested using several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 11 .

***ASI: GTLP is the TI derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The ac specification of the SN74GTLP1394 is given only at the preferred higher noise margin GTLP, but the user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTLP (VTT = 1.5 V and VREF = 1 V) signal levels.

***AS INSTRUMENTS INC: Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels, but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. VREF is the B port differential input reference voltage.

***AS INSRUMENT: This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port input/output connections, preventing disturbance of active data on the backplane during card insertion or removal, and permits true live-insertion capability.

***as Instruments (TI): This GTLP device features TI-OPC circuitry, which actively limits the overshoot caused by improperly terminated backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal integrity, which allows adequate noise margin to be maintained at higher frequencies.

***: High-drive GTLP backplane interface devices feature adjustable edge-rate control (ERC\). Changing the ERC\ input voltage between GND and VCC adjusts the B-port output rise and fall times. This allows the designer to optimize system data-transfer rate and signal integrity to the backplane load.

***ASI: When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, the output-enable (OE\) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74GTLP1394DR 更多信息

Logic Solutions: OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More

Market price

型號	描述	庫存	價格
SN74GTLP1394DR DISTI # 296-9813-1-ND	IC TRNSLTR BIDIRECTIONAL 16SOIC RoHS: Compliant Min Qty: 1 Container: Cut Tape (CT)	881In Stock	1000:$1.7174 500:$2.0364 100:$2.3921 10:$2.9200 1:$3.2500
SN74GTLP1394DR DISTI # 296-9813-6-ND	IC TRNSLTR BIDIRECTIONAL 16SOIC RoHS: Compliant Min Qty: 1 Container: Digi-Reel®	881In Stock	1000:$1.7174 500:$2.0364 100:$2.3921 10:$2.9200 1:$3.2500
SN74GTLP1394DR DISTI # 296-9813-2-ND	IC TRNSLTR BIDIRECTIONAL 16SOIC RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	5000:$1.5245 2500:$1.5840
SN74GTLP1394DR DISTI # SN74GTLP1394DR	Bus XCVR Single 2-CH 3-ST 16-Pin SOIC T/R (Alt: SN74GTLP1394DR) RoHS: Compliant Min Qty: 2500 Container: Tape and Reel	Europe - 0	2500:€1.8900 5000:€1.6900 10000:€1.4900 15000:€1.4900 25000:€1.3900
SN74GTLP1394DR DISTI # SN74GTLP1394DR	Bus XCVR Single 2-CH 3-ST 16-Pin SOIC T/R - Tape and Reel (Alt: SN74GTLP1394DR) RoHS: Compliant Min Qty: 2500 Container: Reel	Americas - 0	2500:$1.6900 5000:$1.5900 10000:$1.4900 15000:$1.4900 25000:$1.3900
SN74GTLP1394DR	2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity	5000	1000:$1.3500 750:$1.4200 500:$1.6800 250:$1.9800 100:$2.1100 25:$2.4100 10:$2.5800 1:$2.8700
SN74GTLP1394DR	Bus Transceiver, GTLP Series, 1-Func, 2-Bit, Configurable Output, CMOS, PDSO16 RoHS: Compliant	38947	1000:$1.5700 500:$1.6500 100:$1.7200 25:$1.7900 1:$1.9300
SN74GTLP1394DR DISTI # 595-SN74GTLP1394DR	Translation - Voltage Levels 2bit Bus RoHS: Compliant	2495	1:$3.1500 10:$2.8400 100:$2.3200 250:$2.1800 500:$1.9700 1000:$1.6600 2500:$1.5800 5000:$1.5200
SN74GTLP1394D DISTI # 595-SN74GTLP1394D	Translation - Voltage Levels 2-Bit LVTTL/GTLP Bus Xcvr Adj-Edge-Rate RoHS: Compliant	0	1:$3.7800 10:$3.4000 100:$2.7800 250:$2.6100 500:$2.3700 1000:$2.0000 2500:$1.9000
SN74GTLP1394DG4 DISTI # 595-SN74GTLP1394DG4	Translation - Voltage Levels 2B LVTTL to GTLP Adj Edg RateBus Xcvr RoHS: Compliant	0
SN74GTLP1394DRG4 DISTI # 595-SN74GTLP1394DRG4	Translation - Voltage Levels 2B LVTTL to GTLP Adj Edg RateBus Xcvr RoHS: Compliant	0
SN74GTLP1394DRE4 DISTI # 595-SN74GTLP1394DRE4	Translation - Voltage Levels 2-Bit LVTTL/GTLP Bus Xcvr Adj-Edge-Rate RoHS: Compliant	0

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