MT41K256M16LY-093:N

Mfr. #:: MT41K256M16LY-093:N
製造商:: Micron
描述:: IC DRAM 4G PARALLEL 1067MHZ
生命週期:: 製造商新產品
數據表:: MT41K256M16LY-093:N 數據表
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更多信息:: MT41K256M16LY-093:N 更多信息 MT41K256M16LY-093:N Product Details

產品屬性
屬性值

製造商: 美光

產品分類: 記憶

Tags: MT41K256M16LY-0, MT41K256M16L, MT41K256M1, MT41K25, MT41K2, MT41K, MT41, MT4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

MT41K256M16LY-093:N 更多信息

DRAM: Alliance Memory DDR1, SDRAM, and DRAM ranges have high-speed data rates, with memory sizes from 64M to 512M. The memory has commercial (0°C~70°C) and industrial (-40°C~85°C) temperatures. Other features include clock frequency range of 133MHz to 167MHz, data bus width range of 8-bit to 64-bit, with an access time of 5.4ns. Available in TSOP and BGA packages.

MT41x DDR3 SDRAMs: Alliance Memory MT41x DDR3 SDRAMs use double data rate architecture with an interface to transfer two data words per clock cycle at I/O pins. The MT41x DDR3's double data rate architecture is an 8n-prefetch architecture that helps to achieve high-speed operations. These SDRAMs operate from CK and CK# differential clock inputs. The MT41x DDR3 employs a burst-orientated approach to read and write with access starting at the selected location and continuing in a programmed sequence. These SDRAMs use READ and WRITE BL8 and BC4. The MT41x DDR3 SRAMs are able to carry out concurrent operations due to their pipelined and multibank architecture. This helps in providing high bandwidth by hiding row precharge and activation time. These SDRAMs feature self-refresh mode, power-saving mode, and power-down mode.

DDR3L SDRAM: Alliance Memory DDR3L SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins.

Market price

型號	製造商	描述	庫存
MT41K256M16LY-093:N TR DISTI # MT41K256M16LY-093:NTR-ND	Micron Technology Inc	IC DRAM 4G PARALLEL 96FBGA RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
MT41K256M16LY-093:N DISTI # MT41K256M16LY-093:N-ND	Micron Technology Inc	IC DRAM 4G PARALLEL 1067MHZ RoHS: Compliant Min Qty: 1080 Container: Tray	Limited Supply - Call
MT41K256M16LY-093:N DISTI # 340-257987-TRAY	Micron Technology Inc	DRAM RoHS: Compliant	0
MT41K256M16LY-093:N TR DISTI # 340-257987-REEL	Micron Technology Inc	DRAM DDR3 4G 256MX16 FBGA RoHS: Compliant	0
MT41K256M16LY-093:N	Micron Technology Inc	INSTOCK	55818

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