CD4022BNSR

Mfr. #:: CD4022BNSR
描述:: Counter ICs Octal/Divider
生命週期:: 製造商新產品
數據表:: CD4022BNSR 數據表
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更多信息:: CD4022BNSR 更多信息 CD4022BNSR Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 計數器 IC

RoHS：: Y

安裝方式：: 貼片/貼片

包裝/案例：: SO-16

計數器類型：: 十年

邏輯系列：: CD4000

位數：: 10 bit

計數順序：: 向上

工作電源電壓：: 3 V to 18 V

最低工作溫度：: - 55 C

最高工作溫度：: + 125 C

系列：: CD4022B

打包：: 捲軸

功能：: 櫃檯

工作溫度範圍：: - 55 C to + 125 C

輸出電流：: +/- 1.5 mA

品牌：: 德州儀器

產品類別：: 計數器 IC

出廠包裝數量：: 2000

子類別：: 計數器 IC

單位重量：: 0.007079 oz

Tags: CD4022BN, CD4022B, CD4022, CD402, CD40, CD4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4022BNSR 評級和評論

Z***h

55 days all ok

2019-06-10

E**b

Thanks

2019-05-09

CD4022BNSR 描述

***as Instruments: CMOS Octal Counter with 8 Decoded Outputs 16-SO -55 to 125

***ark: OCTAL COUNTER/DIVIDER, CMOS, SOIC-16, FULL REEL

***ical: Counter/Divider Single 4-Bit Octal UP 16-Pin SOP T/R

***ser: Logic - Counters Octal/Divider

***as Instr.: CD4017B and CD4022B are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.

***AS INSTRU: These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT siganl is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes on cycle every 10 clock input cycles in the CD4017B or every 8 clock input cycles in the CD4022B and is used to ripple-clock the succeeding device in a multi-device counting chain.

***AS INSTRUMENTS INCORPORATED: The CD4017B and CD4022B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4017B types also are supplied in 16-lead small-outline packages (M and M96 suffixes).

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