AD9554/PCBZ

Mfr. #:: AD9554/PCBZ
製造商:: Analog Devices Inc.
描述:: EVAL BOARD PLL CLOCK GEN AD9554
生命週期:: 製造商新產品
數據表:: AD9554/PCBZ 數據表
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HTML Datasheet:: AD9554/PCBZ Datasheet
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更多信息:: AD9554/PCBZ 更多信息 AD9554/PCBZ Product Details

產品屬性
屬性值

Tags: AD9554, AD955, AD95, AD9

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AD9554/PCBZ 描述

***et Europe: AD9554 Multiservice Line Card Adaptive Clock Translator Evaluation Board

***ical: AD9554 Clock Generator and Synthesizer Evaluation Board

***i-Key: EVAL BOARD PLL CLOCK GEN AD9554

***ark: Quad PLL Channel OTN & Mu, EB/PCB

***p One Stop Global: Quad PLL Evaluation Board

***log Devices: The AD9554 is a low loop bandwidth clock translator that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9554 generates an output clock synchronized to up to four external input references. The digital PLL (DPLL) allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9554 continuously generates a low jitter output clock even when all reference inputs have failed. The AD9554 operates over an industrial temperature range of −40°C to +85°C. If a smaller device is needed, the AD9554-1 is a version of this device with one output per PLL. If a single or dual DPLL version of this device is needed, refer to the AD9557 or AD9559, respectively. Applications Network synchronization, including synchronous Ethernet and synchronous digital hierarchy (SDH) to optical transport network (OTN) mapping/demapping Cleanup of reference clock jitter SONET/SDH clocks up to OC-192, including FEC Stratum 3 holdover, jitter cleanup, and phase transient control Cable infrastructure Data communications Professional video

Market price

型號	製造商	描述	庫存	價格
AD9554/PCBZ DISTI # V99:2348_06216392	Analog Devices Inc	AD9554 Clock Generator and Synthesizer Evaluation Board RoHS: Compliant	1	1:$193.6062
AD9554/PCBZ DISTI # V36:1790_06216392	Analog Devices Inc	AD9554 Clock Generator and Synthesizer Evaluation Board RoHS: Compliant	0
AD9554/PCBZ DISTI # AD9554/PCBZ-ND	Analog Devices Inc	EVAL BOARD PLL CLOCK GEN AD9554 RoHS: Compliant Min Qty: 1 Container: Box	1In Stock	1:$215.8900
AD9554/PCBZ DISTI # 25553684	Analog Devices Inc	AD9554 Clock Generator and Synthesizer Evaluation Board RoHS: Compliant	1	1:$193.6062
AD9554/PCBZ DISTI # 584-AD9554/PCBZ	Analog Devices Inc	Clock & Timer Development Tools Eval Board AD9554 RoHS: Compliant	2	1:$213.7500

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