AD6642EBZ

Mfr. #:: AD6642EBZ
製造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools Eval Brd - IF Diversity Rcvr
生命週期:: 製造商新產品
數據表:: AD6642EBZ 數據表
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更多信息:: AD6642EBZ 更多信息 AD6642EBZ Product Details

產品屬性
屬性值

製造商：: 模擬設備公司

產品分類：: 數據轉換IC開發工具

RoHS：: Y

產品：: 評估板

類型：: 模數轉換器

工具用於評估：: AD6642

工作電源電壓：: 6 V

打包：: 大部分

說明/功能：: 帶噪聲整形再量化器的雙中頻接收器

系列：: AD6642

品牌：: 模擬設備公司

接口類型：: SPI、USB

用於：: AD6642

最高工作溫度：: + 85 C

最低工作溫度：: - 40 C

工作電源電流：: 2 A

產品類別：: 數據轉換IC開發工具

出廠包裝數量：: 1

子類別：: 開發工具

Tags: AD6642, AD664, AD66, AD6

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AD6642EBZ 描述

***et: Evaluation Board for the AD6642 IF Receiver (144-Ball CSP_BGA version)

***ical: AD6642 ADC Evaluation Board 200MSPS SPI Controller/VisualAnalog Software

***log Devices: The AD6642 is an 11-bit, 200 MSPS, dual-channel intermediate frequency (IF) receiver specifically designed to support multi-antenna systems in telecommunication applications where high dynamic range performance, low power, and small size are desired. The device consists of two high performance analog-to-digital converters (ADCs) and noise shaping requantizer (NSR) digital blocks. Each ADC consists of a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features a wide bandwidth switched-capacitor sampling network within the first stage of the differential pipeline. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) compensates for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows for improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the external MODE pin or the SPI. With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6642 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining an 11-bit output resolution. The NSR block can be programmed to provide a bandwidth of either 22% or 33% of the sample clock. For example, with a sample clock rate of 185 MSPS, the AD6642 can achieve up to 75.5 dBFS SNR for a 40 MHz bandwidth in the 22% mode and up to 73.7 dBFS SNR for a 60 MHz bandwidth in the 33% mode. With the NSR block disabled, the ADC data is provided directly to the output with a resolution of 11 bits. The AD6642 can achieve up to 66.5 dBFS SNR for the entire Nyquist bandwidth when operated in this mode. This allows the AD6642 to be used in telecommunication applications such as a digital predistortion observation path where wider bandwidths are desired. After digital signal processing, multiplexed output data is routed into two 11-bit output ports such that the maximum data rate is 400 Mbps (DDR). These outputs are set at 1.8 V LVDS and support ANSI-644 levels. The AD6642 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of a separate antenna. This IF sampling architecture greatly reduces compo-nent cost and complexity compared with traditional analog techniques or less integrated digital methods. Flexible power-down options allow significant power savings. Programming for device setup and control is accomplished using a 3-wire SPI-compatible serial interface with numerous modes to support board-level system testing. The AD6642 is available in a Pb-free/RoHS compliant, 144-ball, 10 mm × 10 mm chip scale package ball grid array (CSP_BGA) and is specified over the industrial temperature range of -40°C to +85°C. Applications Communications Diversity radio and smart antenna (MIMO) systems Multimode digital receivers (3G) WCDMA, LTE, CDMA2000 WiMAX, TD-SCDMA I/Q demodulation systems General-purpose software radios

Market price

型號	製造商	描述	庫存	價格
AD6642EBZ DISTI # AD6642EBZ-ND	Analog Devices Inc	BOARD EVALUATION FOR AD6642 RoHS: Compliant Container: Box	Temporarily Out of Stock
AD6642EBZ DISTI # 584-AD6642EBZ	Analog Devices Inc	Data Conversion IC Development Tools Eval Brd - IF Diversity Rcvr RoHS: Compliant	0

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