CDCLVD2106RHAT

Mfr. #:: CDCLVD2106RHAT
描述:: Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr
生命週期:: 製造商新產品
數據表:: CDCLVD2106RHAT 數據表
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更多信息:: CDCLVD2106RHAT 更多信息 CDCLVD2106RHAT Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 時鐘緩衝器

RoHS：: Y

系列：: CDCLVD2106

輸出數量：: 12 Output

最大輸入頻率：: 800 MHz

傳播延遲 - 最大值：: 1.5 ns

電源電壓 - 最大值：: 2.625 V

電源電壓 - 最小值：: 2.375 V

最低工作溫度：: - 40 C

最高工作溫度：: + 85 C

安裝方式：: 貼片/貼片

包裝/案例：: VQFN-40

打包：: 捲軸

輸入類型：: LVCMOS、LVDS、LVPECL

輸出類型：: LVDS

品牌：: 德州儀器

佔空比 - 最大值：: 50 %

最大輸出頻率：: 800 MHz

開發套件：: CDCLVD2106EVM

濕氣敏感：: 是的

工作電源電流：: 137 mA

產品類別：: 時鐘緩衝器

出廠包裝數量：: 250

子類別：: 時鐘和定時器 IC

單位重量：: 0.003668 oz

Tags: CDCLVD2106, CDCLVD2, CDCLVD, CDCLV, CDCL, CDC

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CDCLVD2106RHAT 描述

***ical: Clock Fanout Buffer 24-OUT 2-IN Dual 1:6 40-Pin VQFN EP T/R

***p One Stop Global: Clock Fanout Buffer 24-OUT 40-Pin VQFN EP T/R

***as Instruments: Low Jitter, Dual 1:6 Universal-to-LVDS Buffer 40-VQFN -40 to 85

***i-Key: IC CLK BUFFER 1:6 800MHZ 40VQFN

***ASIN: The CDCLVD2106 clock buffer distributes two clock inputs (IN0, IN1) to a total of 12 pairs of differential LVDS clock outputs (OUT0, OUT11). Each buffer block consists of one input and 6 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.

***OMO Electronic: The CDCLVD2106 is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.

***AS INSTRUMENT: Using the control pin (EN), outputs can be either disabled or enabled. If the EN pin is left open two buffers with all outputs are enabled, if switched to a logical "0" both buffers with all outputs are disabled (static logical "0"), if switched to a logical "1", one buffer with six outputs is disabled and another buffer with six outputs is enabled. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.

***XS: The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD2106 is packaged in small 40-pin, 6-mm × 6-mm QFN package.

Market price

型號	描述	庫存	價格
CDCLVD2106RHAT DISTI # 296-28234-1-ND	IC CLK BUFFER 1:6 800MHZ 40VQFN RoHS: Compliant Min Qty: 1 Container: Cut Tape (CT)	737In Stock	100:$8.4952 10:$10.0590 1:$10.9400
CDCLVD2106RHAT DISTI # 296-28234-6-ND	IC CLK BUFFER 1:6 800MHZ 40VQFN RoHS: Compliant Min Qty: 1 Container: Digi-Reel®	737In Stock	100:$8.4952 10:$10.0590 1:$10.9400
CDCLVD2106RHAT DISTI # 296-28234-2-ND	IC CLK BUFFER 1:6 800MHZ 40VQFN RoHS: Compliant Min Qty: 250 Container: Tape & Reel (TR)	Temporarily Out of Stock	1250:$6.7298 500:$7.3370 250:$7.8430
CDCLVD2106RHAT DISTI # CDCLVD2106RHAT	Clock Fanout Buffer 24-OUT 40-Pin VQFN EP T/R (Alt: CDCLVD2106RHAT) RoHS: Compliant Min Qty: 250 Container: Tape and Reel	Asia - 0
CDCLVD2106RHAT DISTI # CDCLVD2106RHAT	Clock Fanout Buffer 24-OUT 40-Pin VQFN EP T/R - Tape and Reel (Alt: CDCLVD2106RHAT) RoHS: Compliant Min Qty: 250 Container: Reel	Americas - 0	250:$7.2900 500:$6.8900 1000:$6.6900 1500:$6.4900 2500:$6.2900
CDCLVD2106RHAT	Low Jitter, Dual 1:6 Universal-to-LVDS Buffer	4000	1000:$5.7500 750:$5.7700 500:$6.4300 250:$6.9800 100:$7.3400 25:$8.4000 10:$8.7000 1:$9.3600
CDCLVD2106RHAT DISTI # 595-CDCLVD2106RHAT	Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr RoHS: Compliant	290	1:$10.6300 10:$9.7700 25:$9.2600 100:$8.2500 250:$7.8500 500:$7.3400 1000:$6.7300
CDCLVD2106RHAR DISTI # 595-CDCLVD2106RHAR	Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr RoHS: Compliant	0	2500:$5.7200

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