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SN74ABT657ANSRG4

SN74ABT657ANSRG4
Mfr. #:
SN74ABT657ANSRG4
描述:
Bus Transceivers Octal Transceivers
生命週期:
製造商新產品
數據表:
SN74ABT657ANSRG4 數據表
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更多信息:
SN74ABT657ANSRG4 更多信息 SN74ABT657ANSRG4 Product Details
產品屬性
屬性值
製造商：
德州儀器
產品分類：
總線收發器
RoHS：
Y
邏輯系列：
74ABT
輸入電平：
TTL
輸出電平：
TTL
輸出類型：
3-State
高電平輸出電流：
- 32 mA
低電平輸出電流：
64 mA
傳播延遲時間：
4.6 ns
電源電壓 - 最大值：
5.5 V
電源電壓 - 最小值：
4.5 V
最低工作溫度：
- 40 C
最高工作溫度：
+ 85 C
包裝/案例：
SOP-24
打包：
捲軸
功能：
帶有奇偶校驗器的總線收發器
高度：
1.95 mm
長度：
15 mm
電路數量：
1
產品：
雙CMOS
技術：
雙CMOS
寬度：
5.3 mm
品牌：
德州儀器
安裝方式：
貼片/貼片
通道數：
8
電源電流 - 最大值：
40 mA
工作電源電壓：
4.5 V to 5.5 V
極性：
同相
產品類別：
總線收發器
出廠包裝數量：
1
子類別：
邏輯 IC
單位重量：
0.038731 oz
Tags
SN74ABT657ANS, SN74ABT657AN, SN74ABT657, SN74ABT65, SN74ABT6, SN74AB, SN74A, SN74, SN7
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Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR TRI-ST 16BIT 24SO
***as Instruments
The 'ABT657A transceivers have eight noninverting buffers with parity-generator/ checker circuits and control signals. The transmit/receive (T/R\) input determines the direction of data flow. When T/R\ is high, data flows from the A port to the B port (transmit mode); when T/R\ is low, data flows from the B port to the A port (receive mode). When the output-enable (OE\) input is high, both the A and B ports are in the high-impedance state. Odd or even parity is selected by a logic high or low level on the ODD/EVEN\ input. PARITY carries the parity-bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode. In the transmit mode, after the A bus is polled to determine the number of high bits, PARITY is set to the logic level that maintains the parity sense selected by the level at ODD/EVEN\. For example, if ODD/EVEN\ is low (even parity selected) and there are five high bits on the A bus, PARITY is set to the logic high level so that an even number of the nine total bits (eight A-bus bits plus parity bit) are high. In the receive mode, after the B bus is polled to determine the number of high bits, the error (ERR\) output logic level indicates whether or not the data to be received exhibits the correct parity sense. For example, if ODD/EVEN\ is high (odd parity selected), PARITY is high, and there are three high bits on the B bus, ERR\ is low, indicating a parity error. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT657A is characterized for operation over the full military temperature range of -55C to 125C. The SN74ABT657A is characterized for operation from -40C to 85C.
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可用性
庫存:
Available
訂購:
1500
輸入數量:
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