CD4029BE

Mfr. #:: CD4029BE
描述:: Counter ICs Preset UpDn Binary
生命週期:: 製造商新產品
數據表:: CD4029BE 數據表
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更多信息:: CD4029BE 更多信息 CD4029BE Product Details

產品屬性
屬性值

製造商：: 德州儀器

產品分類：: 計數器 IC

RoHS：: Y

安裝方式：: 通孔

包裝/案例：: PDIP-16

計數器類型：: 二進制，十年

邏輯系列：: CD4000

位數：: 4 bit

計數方法：: 同步

計數順序：: 上/下

工作電源電壓：: 3 V to 18 V

最低工作溫度：: - 55 C

最高工作溫度：: + 125 C

系列：: CD4029B

打包：: 管子

功能：: 櫃檯

工作溫度範圍：: - 55 C to + 125 C

輸出電流：: +/- 1.5 mA

品牌：: 德州儀器

產品類別：: 計數器 IC

出廠包裝數量：: 25

子類別：: 計數器 IC

單位重量：: 0.033570 oz

Tags: CD4029BE, CD4029B, CD4029, CD402, CD40, CD4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4029BE 評級和評論

Y***v

Thank you!

2019-01-26

E***k

Long waited, otherwise everything is fine!

2019-05-07

CD4029BE 描述

***et: Counter Single 4-Bit Async Binary/Decade UP/Down 16-Pin PDIP Tube

***as Instruments: CMOS Presettable Up/Down Counter 16-PDIP -55 to 125

***ied Electronics & Automation: Counter, Up/Down; Presettable Up/Down; 20 V; 500 mW; 5 pF (Typ.);

***i-Key: IC PRESET UP/DWN COUNTER 16-DIP

***eco: IC,CD4029BE,16 LEAD PDIP <AZ

***trelec: Logic IC Presettable u/d Count DIL-16

***ser: Logic - Counters Preset UpDn Binary

***ark: Counter / Multiplier / Divider Logic IC; Counter Type:Binary / BCD Up-Down; Clock Speed:11MHz; Supply Voltage Range:3V to 18V; Logic Case Style:DIP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C ;RoHS Compliant: Yes

***nell: COUNTER/MULTIPLIER/DIVIDER; Logic IC Function:CMOS Presettable Up/Down Counter; Logic IC Family:CD4000; Logic IC Base Number:4029; Max Clock Frequency:11MHz; Count, Max:4; Counter Function:Presettable Up / Down Counter; Voltage, Supply Min:3V; Voltage, Supply Max:18V; Case Style:CDIP; Operating Temperature Range:-55°C to +125°C; Base Number:4029; No. of Pins:16; Termination Type:Through Hole

***ment14 APAC: IC, COUNTER/MULTIPLIER/DIVIDER; Counter Type:Binary / BCD, Up / Down; Clock Frequency:11MHz; Count Maximum:15; Supply Voltage Range:3V to 18V; Logic Case Style:DIP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; SVHC:No SVHC (19-Dec-2011); Base Number:4029; Clock Frequency Max:11MHz; Count Max:4; Counter Measuring Functions:Presettable Up / Down Counter; Logic IC Base Number:4029; Logic IC Family:CD4000; Logic IC Function:CMOS Presettable Up/Down Counter; Package / Case:CDIP; Supply Voltage Max:18V; Supply Voltage Min:3V; Termination Type:Through Hole

***AS INSTRU: CD4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN\ (CLOCK ENABLE\), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAN signals, Q1, Q2, Q3, Q4 and a CARRY OUT\ signal are provided as outputs.

***AS USD: A high PRESET ENABLE signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the PRESET-ENABLE signal is high, resets the counter to its zero count. The counter is advanced one count at the positive transition of the clock when the CARRY-IN\ and PRESET ENALBE signals are low. Advancement is inhibited when the CARRY-IN\ or PRESET ENABLE signals are high. The CARRY-OUT\ signal is normally high and goes low when the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN\ signal is low. The CARRY-IN\ signal in the low state can thus be considered a CLOCK ENABLE\. The CARRY-IN\ terminal must be connected to VSS when not in use.

***OMO Electronic: Binary counting is accomplished when the BINARY/DECADE input is high; the counter counts in the decade mode when the BINARY/DECADE input is low. The counter counts up when the UP/DOWN input is high, and down when the UP/DOWN input is low. Multiple packages can be connected in either a parallel-clocking or a ripple-clocking arrangement as shown in Fig. 17.

***NS: Parallel clocking provides synchronous control and hence faster response from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times.

***AS USD: The CD4029B-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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