DC1151A-H

Mfr. #:: DC1151A-H
製造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools LTC2272CUJ - 16-bit, 65Msps Serial ADC,
生命週期:: 製造商新產品
數據表:: DC1151A-H 數據表
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HTML Datasheet:: DC1151A-H Datasheet DC1151A-H Datasheet (P4-P6)DC1151A-H Datasheet (P7)
ECAD Model:
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產品屬性
屬性值

製造商：: 模擬設備公司

產品分類：: 數據轉換IC開發工具

RoHS：: Y

產品：: 演示板

類型：: 模數轉換器

工具用於評估：: LTC2272

工作電源電壓：: 3.135 V to 3.465 V

系列：: LTC2272

品牌：: 模擬設備公司

產品類別：: 數據轉換IC開發工具

出廠包裝數量：: 1

子類別：: 開發工具

Tags: DC1151, DC115, DC11, DC1

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC1151A-H 描述

***ical: LTC2272 ADC Demonstration Circuit 65MSPS Pscope IDE

***ponent Distributors Inc.: LTC2272CUJ Evaluation Kit (Fin= 70-140MHz)

***hardson RFPD: LINEAR ICS - EVALUATION BOARD

***i-Key: EVAL BOARD FOR LTC2272

***ment14 APAC: DEMO BOARD, ADC

***ark: Demo Board, Adc; Silicon Manufacturer:linear Technology; Silicon Core Number:ltc2272; No. Of Bits:16Bit; Sample Rate:65Msps; Kit Application Type:data Converter; Application Sub Type:adc; Kit Contents:demo Board Ltc2272 Rohs Compliant: Na

***log Devices: The LTC2273/LTC2272 are 80Msps/65Msps, 16-bit A/D converters with a high speed serial interface. They are designed for digitizing high frequency, wide dynamic range signals with an input bandwidth of 700MHz. The input range of the ADC can be optimized using the PGA front end. The output data is serialized according to the JEDEC serial interface for data converters specification (JESD204). The LTC2273/LTC2272 are perfect for demanding applications where it is desirable to isolate the sensitive analog circuits from the noisy digital logic. The AC performance includes a 77.7dB Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low internal jitter of 80fs RMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4.5LSB INL and ±1LSB DNL (no missing codes) over temperature. The encode clock inputs, ENC+ and ENC–, may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. A clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE

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