ISSI's MCP solution enables the miniaturization of feature-rich, low-power applications through the combination of high-performance LPDDR2 DRAM and serial NOR Flash into a small and consistent footprint.
LPDDR2 DRAM Features |
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Serial Flash Features |
- Densities:
- Low-voltage core and I/O power supplies
- VDD2 of 1.2 V
- VDDCA/VDDQ of 1.2 V
- VDD1 of 1.8 V
- Options of x16 or x32
- High-speed, un-terminated logic (HSUL_12) I/O interface
- Clock frequency range of 10 MHz to 533 MHz (data rate range of 20 Mbps to 1066 Mbps per I/O)
- Four-bit, pre-fetch DDR architecture
- Multiplexed, double-data rate, command/address inputs
- Four or eight internal banks for concurrent operation
- Bidirectional/differential data strobe per byte of data (DQS/DQS#)
- Programmable read/write latencies (RL/WL) and burst lengths of 4, 8, or 16
- ZQ calibration
- On-chip temperature sensor to control self-refresh rate
- Partial-array self-refresh (PASR)
- Deep power-down mode (DPD)
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- 64 Mb or 128 Mb
- Industry standard serial interface
- VDD = 1.8 V
- 256 bytes per programmable page
- Supports standard SPI, fast, dual, dual I/O, quad, quad I/O, SPI DTR, dual I/O DTR, quad I/O DTR, and QPI
- Supports serial Flash discoverable parameters (SFDP)
- 50 MHz normal and 133 MHz fast read
- 532 MHz equivalent QPI
- Dual transfer rate (DTR) up to 66 MHz
- Selectable dummy cycles
- Configurable drive strength
- More than 100,000 erase/program cycles
- More than 20-year data retention
- Chip erase with uniform: sector/block erase (4/32/64 Kbyte)
- Program 1 to 256 bytes per page
- Program/erase, suspend, and resume
- Low instruction overhead operations
- Continuous read 8/16/32/64-byte burst
- Selectable burst length
- QPI for reduced instruction overhead
- AutoBoot operation
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Temperature Grades |
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Package |
- Commercial: 0°C to 70°C
- Industrial: -40°C to 85°C
- Automotive, A1: -40°C to 85°C
- Automotive, A2: -40°C to 105°C
- Automotive, A25: -40°C to 115°C
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- 168-ball PoP BGA
- Consistent footprint with density migration
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